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[Colloquium] Multicore and Other New Approaches to Reduce the Data Access Latency

April 24, 2007

  • Date: Thursday, April 24, 2007 
  • Time: 11 am— 12:15 pm 
  • Place: ECE 118

Martin Burtscher 
Cornell University

Abstract: High-end microprocessors are poorly utilized because they often have to wait for data to be delivered. This talk presents several novel hardware and software ideas that alleviate this inefficiency by reducing the time it takes to access the data. First, we briefly discuss two latency-hiding techniques, load-value prediction and source code scheduling. Second, we present an innovative multicore approach called Future Execution to lower the access latency. Future Execution pairs up cores and transparently and continuously converts the running program thread into a helper thread that is streamed into the alternate core. Third, we introduce a high-speed lossless compression algorithm to decrease the data size in real time. We conclude the talk with an outlook into the future.

Bio: Martin Burtscher is an assistant professor in the School of Electrical and Computer Engineering at Cornell University. His research focuses on architecture and code optimization techniques to improve the data access efficiency of high-end microprocessor systems. He received the combined BS/MS degree in computer science from the Swiss Federal Institute of Technology (ETH) Zurich in 1996 and the PhD degree in computer science from the University of Colorado at Boulder in 2000. He is a senior member of the ACM and the IEEE.

Note: This video is not available via the web, but rather is available as a DVD that can be checked out from Support in room 307.